Given the stalling with the move to 10nm by Intel gives credence to a technological wall. The is another option which can reduce the cost of a given device by as much as 50%. Moving from the current 300mm bolus to the larger 450mm bolus is necessitated.
The 300mm size is commonly called 12 inch. The larger 450mm are commonly called 18 inch. Given the 450mm is three times the weight, it will take three times longer to cool.
Silicon is not infinitely strong having same tetrahedral structure like diamonds. Sawing 450mm wafers lose savings on the slightly larger thickness required.
14nm fabrication is very mature. The different steps can all be adapted to the new wafer diameter, the has been done before several times since 1970. The gain of a 40% increase in devices is very desirable.
Now that Cray and AMD are working together with a new supercomputer for the government, PCI Express 5 will be available for consumer rigs sooner or later. Moving to larger wafers would allow more chiplet designs like the Ryzen 3000 series use. More overkill with the, hard to find, R9 3900X. The new R9 3950X has a few more cores assume the flagship leading to the important autumn and winter sales.
The monolithic R5 2400G is not a chiplet design. 16 gigabit memory has entered the consumer markets and the larger wafer would reduce costs. PCI Express 3.0 is overkill for graphics but PCI Express 5 looks better in marketing catalogs.
One of the design criteria with PCI Express is the backwards and forwards compatibility. The old Acer E700 can use a modern short length card like the EVGA GTX 1060 easily as there is room for the dual slot design.
The old Asus HD 5450 supports HDMI but it lacks DisplayPort. It can provide a video output for any machine that lacks integrated graphics. The passive cooling makes the card easier to use.
The X470 is connected to the CPU via four PCI Express 3.0 lanes. The X570 is connected to the CPU via four PCI Express 4.0 lanes. This trend will continue when PCI Express 5.0 comes to consumer machines.
The SSD performance can be scaled with PCI Express readily which affords even faster boot times. Larger 450mm wafers would allow for SSD prices to be even lower.
|transistors per core||100,000||100,000,000||x1000|
|frequency of operation||5 Mhz||5 GHz||x1000|
|# processing steps||100||10000||x100|
|wafer dismeter||6 inch||12 inch||x2|
|printed die per wafer||1X||4X||x2|
|# mask layers||10||100||x10|
|minimum feature size||3 microns||< 5 nm||x6000|
|transistors / mm²||1,000||100,000,000||x10000|
|cost per transistor||0.1 cents||0.0000000001 cents||x10000000|
|fab cost||$1 million||$10 billion||x10000|
|instruction per cycle||0.3||3||x10|
|# personal computing devices||< 10 million||> 10 billion||x1000|
The table shows how improvements have been made since 1980 before the IBM PC was even designed and released.
Nanowires have been studied for a long times. They are more research than substantive but lasers and FET transistors have been demonstrated.