Samsung has mentioned that 2nm process is expected to be available ca. 2025.

The logic will use the gate-all-around (GAA) technology the company debuted in 2019. GAA is now widely used with smaller devices which keeps the transistors operating properly. The FinFET approach doesn’t work so good at smaller nodes so the entire industry is switching over.

Samsung calls its effort Multi-Bridge-Channel FET (MBCFET), and says its first-generation 3nm node using the technology will deliver “up to 35 per cent decrease in area, 30% higher performance or 50% lower power consumption compared to the 5nm process.”

3nm logic yield is approaching a similar level to the 4nm process, which is currently in mass production. NVIDIA is likely to be considering 4nm for their next GPU given TSMC is backordered.